The Vera Rubin NVL144 CPX rack, as NVIDIA described it in September 2025, puts two different chips in the same enclosure: 144 Rubin CPX dies built for the compute-heavy prefill phase of inference, and 144 standard Rubin GPUs built for the memory-heavy decode phase, bolted to 36 Vera CPUs. That's prefill/decode disaggregation poured into sheet metal, the same split vLLM and SGLang already run in software today, except NVIDIA proposed shipping it as two different pieces of silicon. Here's what Rubin CPX actually is, how its specs stack up against the standard Rubin GPU, and where the chip stands thirteen months after NVIDIA first announced it.
TL;DR: Vera Rubin NVL144 CPX vs the Standard Rubin GPU
- Chip: Rubin CPX is a single monolithic die with up to 30 PFLOPS of NVFP4 compute and 128GB of GDDR7 memory, announced by NVIDIA in September 2025 for the compute-bound prefill phase of inference.
- Rack: the Vera Rubin NVL144 CPX rack combines 144 Rubin CPX GPUs, 144 standard Rubin GPUs, and 36 Vera CPUs for 8 exaflops of AI compute and 100TB of fast memory.
- Decode partner: the standard Rubin GPU carries 288GB of HBM4 at 22 TB/s and 50 PFLOPS of NVFP4 inference compute, the memory-heavy counterpart to CPX's compute-heavy design.
- Status: NVIDIA pulled Rubin CPX from its public roadmap in March 2026; an unconfirmed September 2026 report claims a 168GB HBM4 redesign targeting Q1 2027.
- Spheron: Spheron runs a pre-order pipeline for standard Rubin GPU capacity with no published pricing yet, and no Rubin CPX-specific product exists anywhere. Check Vera Rubin availability.
What Problem Disaggregated Inference Actually Solves
Every LLM inference request runs through two phases with opposite resource profiles. Prefill processes the entire prompt at once, computing attention across every input token in parallel. It's compute-bound: the GPU's matmul units are the bottleneck, and a prompt with more tokens just means more parallel work to chew through. Decode generates one output token at a time, and each step re-reads the growing key-value cache to compute attention against every token generated so far. It's bandwidth-bound: the GPU spends most of its time waiting on memory, not computing.
Run both phases on the same GPU allocation and you're paying for a chip sized for whichever phase you didn't optimize for. A GPU with enough compute to make prefill fast sits partially idle during decode, waiting on memory reads it can't speed up with more FLOPS. A GPU with enough memory bandwidth to make decode fast is more silicon than prefill actually needs.
NVIDIA frames disaggregated serving, splitting prefill and decode across separate GPU allocations so compute-bound and bandwidth-bound work each get hardware sized for their own bottleneck, as the architecture its Dynamo inference framework and the Rubin platform are built around. Rubin CPX was the attempt to push that split down into silicon itself, rather than just scheduling it across identical GPUs.
Rubin CPX Specs: 30 PFLOPS NVFP4, 128GB GDDR7, One Monolithic Die
NVIDIA unveiled Rubin CPX at its AI Infra Summit in September 2025 as a GPU variant built specifically for massive-context inference. The core specs, as NVIDIA announced them, are up to 30 PFLOPS of NVFP4 compute and 128GB of GDDR7 memory, on a single monolithic die rather than the multi-die, HBM-stacked packaging more typical of NVIDIA's flagship data center chips. The chip also integrates four NVENC and four NVDEC engines on-chip, per TechPowerUp's breakdown of the announcement, aimed at long-format multimodal workloads like video that need to encode and decode frames alongside running inference.
GDDR7 over HBM4 was the deliberate tradeoff. GDDR7 is cheaper per gigabyte and keeps the die simpler to manufacture, which matters when prefill's bottleneck is compute throughput, not memory capacity or bandwidth. A monolithic die without HBM stacking is also less exotic to package than the flagship Rubin GPU, which is part of why NVIDIA could plan to put 144 of them in a rack at the same count as 144 full Rubin GPUs rather than needing fewer, pricier general-purpose chips to cover the same prefill workload. NVIDIA originally targeted general availability for Rubin CPX by the end of 2026, per that same TechPowerUp breakdown.
Inside the Vera Rubin NVL144 CPX Rack: 144 + 144 + 36, 8 Exaflops
The rack-scale system NVIDIA built around Rubin CPX combines 144 Rubin CPX GPUs, 144 standard Rubin GPUs, and 36 Vera CPUs, delivering 8 exaflops of AI compute, 100TB of fast memory, and 1.7 petabytes per second of memory bandwidth across the whole rack. NVIDIA's claim at announcement was 7.5x more AI performance than a GB300 NVL72 system.
Jensen Huang's framing at the time, quoted in NVIDIA's own announcement: "Just as RTX revolutionised graphics and physical AI, Rubin CPX is the first CUDA GPU purpose-built for massive-context AI, where models reason in millions of tokens of knowledge at once." NVIDIA also projected up to $5 billion in token revenue per $100 million invested in Rubin CPX infrastructure, though that figure is a vendor projection, not a measured result, and should be read that way.
Naming here gets confusing fast, and worth clearing up before you search further. NVIDIA's flagship rack, built from 72 standard Rubin GPU packages and 36 Vera CPUs, is correctly called Vera Rubin NVL72. Our Vera Rubin NVL72 guide covers why NVIDIA renamed that system from an earlier "NVL144" die count to NVL72 package count, and why "H300" isn't a real product despite showing up in search results. The Vera Rubin NVL144 CPX rack described above is a separate system entirely: it keeps the "144" in its name because it counts 144 Rubin CPX dies specifically, paired with 144 standard Rubin GPUs for decode, not because it's a renamed version of the flagship.
Rubin CPX vs the Standard Rubin GPU: Compute Density vs Memory Capacity
Rubin CPX trades memory capacity for a cheaper, compute-dense chip built for prefill; the standard Rubin GPU trades some of that cost efficiency for the 288GB of HBM4 decode actually needs. Here's the full comparison:
| Spec | Rubin CPX | Standard Rubin GPU |
|---|---|---|
| Memory | 128GB GDDR7 | 288GB HBM4 |
| Memory bandwidth | not officially published by NVIDIA | up to 22 TB/s |
| Compute | up to 30 PFLOPS NVFP4 | 50 PFLOPS NVFP4 (inference) |
| Target phase | prefill (compute-bound) | decode and general-purpose (training + inference) |
| On-chip media engines | 4 NVENC + 4 NVDEC | not a CPX-specific feature |
| Count in NVL144 CPX rack | 144 | 144 |
Notice CPX's 30 PFLOPS of NVFP4 compute is actually lower in absolute terms than the standard Rubin GPU's 50 PFLOPS, which comes from the same spec table behind NVIDIA's Vera Rubin NVL72 page (3,600 PFLOPS of rack-level NVFP4 inference divided across 72 GPUs lands on the same 50 PFLOPS per chip). "Compute density" here doesn't mean more raw FLOPS than the flagship chip, it means NVIDIA could build a simpler, cheaper die and deploy it at the same 144-chip count as the full Rubin GPU, concentrating prefill-specific throughput into hardware that didn't need HBM4's cost or packaging complexity to do that one job. For the standard chip's own architecture, HBM4 timeline, and how it stacks up against B200, see our NVIDIA Rubin GPU specs guide.
Where Rubin CPX Actually Stands as of October 2026
NVIDIA pulled Rubin CPX from its public roadmap at GTC in March 2026, redirecting its inference strategy toward the Groq 3 LPX Rack, a different, SRAM-based decode accelerator NVIDIA picked up through a licensing deal with Groq. Our Rubin CPX cancellation and Groq pivot post covers that shift and the architectural reasoning behind it in full, so this post won't repeat it.
That wasn't the end of the story. In September 2026, analyst Ming-Chi Kuo reported that Rubin CPX is back in a redesigned form: 168GB of HBM4 in place of the original 128GB GDDR7, standalone racks rather than the combined NVL144 CPX layout, roughly 2,300W of power draw, and a target of Q1 2027 for production. NVIDIA has not confirmed any part of this report. Until it does, treat the redesign as reported, not official, and don't plan a deployment around specs that haven't come from NVIDIA itself.
What that leaves buyers with heading into 2027: no shipping Rubin CPX in any form, no confirmed specs for a revived version, and no pricing. The standard Rubin GPU, not CPX, is what cloud providers are actually planning capacity around for H2 2026. Our Vera Rubin NVL72 cloud availability post tracks who has live Rubin capacity and how to plan cost per token around it.
The Hardware Version of a Pattern vLLM and SGLang Already Run
The pattern Rubin CPX formalized in silicon is already running in production serving stacks today, just in software. vLLM and SGLang both support disaggregated serving: a request's prefill step runs on one pool of GPUs, the KV cache transfers over the network, and decode continues on a separate pool sized for memory bandwidth rather than compute. Our vLLM on Vera Rubin NVL72 post covers that day-0 support and the throughput gains it unlocks on current Rubin hardware.
Rubin CPX's pitch was to make that same split happen at the chip level instead of the scheduling level: build two chips, price each one to the phase it serves, and never pay for compute you don't need during decode or memory you don't need during prefill. Whether CPX ships as originally announced, stays cancelled, or arrives as the reported 2027 redesign, the operational question it formalizes doesn't go away. If you're sizing a serving cluster today, you're answering the same question CPX was built to answer in hardware: how much compute does your prefill actually need, how much memory bandwidth does your decode actually need, and whether splitting those across separate GPU pools beats running both phases on identical, generalist hardware.
What to Evaluate Before Reserving Rubin Capacity on Spheron
A few things worth checking before you commit to a Rubin reservation anywhere, Spheron included:
- Confirm which chip you actually need. There is no Rubin CPX-specific product or reservation anywhere right now, including on Spheron. Spheron's pre-order pipeline covers the standard Rubin GPU, not the context-phase chip NVIDIA itself hasn't confirmed a shipping version of.
- There's no published price to compare against yet. Spheron's Vera Rubin page runs an interest pipeline rather than a live reservation: you register, and the team follows up with pricing and availability once capacity goes live, targeting the first cloud cohort in H2 2026 and broader neocloud availability in 2027.
- Specialist clouds sit behind the first hyperscaler cohort. If your workload needs Rubin-class capacity within 2026, a neocloud pre-order pipeline won't get you there; the first wave goes to hyperscalers and a handful of large providers.
- If you need the memory headroom now, not in 2027, B300's 288GB of HBM3e is the closest available stand-in for the capacity Rubin CPX targeted, and it's live today: $5.40/hr on-demand as of 17 Sep 2026 on Spheron's B300 page.
Pricing fluctuates based on GPU availability. Spheron rates above are live as of 17 Sep 2026; other figures reflect the most recently published reporting and may have changed. Check current GPU pricing → for live rates.
Rubin CPX's status is still unsettled, but the decision it was built to simplify, how to split prefill and decode across your fleet, isn't going anywhere. If you're planning ahead for Rubin capacity or need Blackwell-class memory now, Spheron covers both ends.
Frequently Asked Questions
Rubin CPX was designed for the prefill phase of long-context inference, the compute-heavy step where a model processes an entire prompt before generating its first output token. NVIDIA specced it with up to 30 PFLOPS of NVFP4 compute, 128GB of GDDR7 memory, and on-chip NVENC/NVDEC engines for multimodal context, then paired it with 144 standard Rubin GPUs for decode inside the Vera Rubin NVL144 CPX rack.
Rubin CPX is a single monolithic die with 128GB of GDDR7 memory and up to 30 PFLOPS of NVFP4 compute, built for compute-bound prefill. The standard Rubin GPU carries 288GB of HBM4 at 22 TB/s and 50 PFLOPS of NVFP4 inference compute, built for the memory-bandwidth-bound decode phase and general-purpose training and inference. They're meant to work as a pair, not as substitutes for each other.
Not formally, but NVIDIA pulled it from its public roadmap at GTC in March 2026 and pivoted its inference messaging toward the Groq 3 LPX Rack instead. In September 2026, Ming-Chi Kuo reported, without NVIDIA confirmation, that CPX is back in a redesigned form with 168GB of HBM4, standalone racks, roughly 2,300W power draw, and a target of Q1 2027 production. Treat CPX as unresolved, not shipping, as of October 2026.
As NVIDIA announced it in September 2025, one Vera Rubin NVL144 CPX rack combines 144 Rubin CPX GPUs, 144 standard Rubin GPUs, and 36 Vera CPUs, delivering 8 exaflops of AI compute, 100TB of fast memory, and 1.7 petabytes per second of memory bandwidth. NVIDIA claimed 7.5x more AI performance than a GB300 NVL72 system.
